Debug Validation Engineer (Multiple Levels)

Join Graphcore, a leading AI compute company, as a Debug Validation Engineer. In this role, you will drive post-silicon debug and validation activities for next-generation AI compute silicon and systems. You will lead teams in identifying, reproducing, analyzing, and resolving complex silicon, firmware, and system-level issues. This position requires deep technical debugging expertise and strong cross-functional collaboration across multiple engineering fields.

• Lead post-silicon debugging and validation efforts for AI compute silicon and platform technologies, driving the identification, reproduction, analysis, and resolution of complex issues.
• Develop structured debug methodologies and failure analysis processes to improve issue resolution efficiency, and work in close partnership with cross-functional teams to determine root causes.
• Contribute to the continuous improvement of debug methodologies, validation infrastructure, and engineering workflows, ensuring consistent and repeatable analysis.
• Excellent problem-solving, analytical, and diagnostic skills
• Strong programming skills in Python, C, or debug scripting languages such as CMM or equivalent experience
• Strong experience in bare metal environments
• Strong Linux and Python experience
• Deep knowledge of scan, DFT, JTAG, and trace infrastructure
• Highly motivated self-starter with a collaborative and team-oriented approach
• Expertise in debug infrastructure and post-silicon debug methodologies
• Capability to operate autonomously on technically intricate debug and validation tasks spanning hardware, firmware, and software areas
• Strong understanding of SoC and platform architectures
• Experience of the post-silicon validation process applied in digital ASIC environments
• Ability to collaborate across teams and programming languages to uncover root causes of deep and complex issues
• Outstanding communication skills and the ability to collaborate effectively to solve complex problems
• Strong debug skills including fault tree analysis, failure isolation, fishbone methodologies, and system-level debug techniques
• Understanding of DFT flows from insertion through post-silicon validation
• Experience in characterization, failure analysis, test development, statistical analysis, and customer support
• Understanding of ML applications and associated workloads
• Experience with AMBA protocols
• Experience with Arm CPU architectures, system IP, and associated debug tooling
• Strong understanding of mixed-signal components like PLLs, high-speed PHYs, and IC control/communication protocols
• Experience using CoreSight and similar debug infrastructure including CTI, ETx, DStream, JLink, Lauterbach, ATB, and STM or equivalent experience
• Experience developing tooling for parsing and analyzing debug data, including scan dump parsing
• Driver-level experience with one or more of the following technologies: PCIe, Ethernet, Memory technologies including LPDDR, DDR, and HBM, Peripheral interfaces such as I2C, I3C, and SPI