芯片测试工程师（上海）(J14367)

工作职责

Wafer Sort Testing Engineer is in charge of wafer level memory product developments, including wafer level validation & production testing flow definition, test method definition and implementation, wafer level memory device characterization, qualification and customer return material analysis. Deliver qualified product to mass production as well as sustaining product for wafer level yield improvement, TTR and DPPM reduction.

1. Job Responsibilities
2. Owner of wafer level validation & production testing, characterization, qualification and customer return material analysis.
3. Define wafer level characterization, qualification and mass production test methodologies.
4. Be responsible of wafer level memory product test program development and validation on varies test platforms. Ensure delivery of test program in time.
5. Be responsible for wafer level test failure analysis and investigation of customer device/application issue during product development phase.
6. Identify device failure mechanism through electrical failure analysis, and support physical failure analysis during development and product development phase.
7. Support testing platform development with HW design engineers.
8. Support wafer level mass production yield improvement, TTR and DPPM reduction.
9. Support other teams, such as design team, PIE, RE required DOEs.

任职资格

1. BS or MS in Electrical/Computer Engineering.
2. Experience with scripting (python/perl), C/C++.
3. Highly organized and self-motivated, good team work and communication skills.
4. The ability to work with other engineers across multiple disciplines, as well as customers.
5. The ability to apply creative and inventive ideas to resolve difficult issues.
6. Knowledge or experience of memory product is a plus.
7. Prior experience with CP test or Sort test is a plus.
8. Prior experience with Teradyne or Advantest ATE platform is a plus.