SIPI Engineer

Responsibilities 1. Work closely with GPU power architects, circuits, and physical designer. And perform power and signal integrity analysis and define noise budget for power supplies of core/MEM/IO/analog/digital signal designs. 2. Responsible for GPU on-die and package, board decoupling caps design. And perform PI/SI analysis simulation, PDC, PSI simulation. Define different MEM/PCIE/Serdes IP/power rails power delivery spec. 3. Familiar with CPU/GPU system level power delivery network, DI/DT, IR-drop analysis, and work close with silicon validation, board level validation team for power optimization. 4. Solid hands-on experience with EDA tools: Sigrity, PowerSI, Ansys Slwave or equivalent. Familiar with Cadence allegro or Mentor Expedition tools. Qualifications 1. MSEE with 5+ years in PI/SI design 2. Strong background of lower power design technologies is a big plus 3. Solid power integrity experience