Security IP Design Engineer (SEC HW)

Responsibilities 1. Be responsible for RTL code development and integration of security engines, including PKE, SKE, HFE, TRNG and PUF engine etc; 2. Work with software team to test & optimize performance and latency in confidential computing,define relevant response processing flows; 3. Work with architect team (SOC/IP) to define block architecture/feature; 4. Work with DV team to define the testplan; 5. Work with implementation team to close the timing; 6. Integrate block design into SOC; 7. Support silicon bringup. Qualifications 1. Be familiar with the confidential computing workflow, understand the interplay between TDI,TDISP,IDE_KVM,IDE,SPDM etc,and be clear about the sepcific role each plays in the architecture and workflow; 2. Practical experience in deploying, testing, debugging confidential computing solutions is a strong plus; 3. Be familiar with memory de/encryption,memory access control mechanism,and be clear about the performance & latency; 4. Be familiar with block design flow and RTL coding, be able to do optimization for area, performance and power; 5. Be familiar with SM2, SM3, SM4, RSA, ECC, SHA, AES, TRNG, PUF etc; 6. Be familiar with security boot, security FW upgrade, security debug/authentication, trusted attestation; 7. Be familiar with asynchronous design; 8. Be familiar with SOC architecture, has experience in the protocol such as AXI, AHB or APB; 9. Self-motivated, proactive, team work and achievement oriented; 10. Good communication skill and work well with cross-functional teams and technical leadership are big plus.