← Back to job listings
CA
AIML enhanced Design/Verification Methodology Engineer
careers.hpe.com · Sunnyvale, California, United States of America
About The Role
We are seeking a Design/Verification Engineer to develop and execute verification strategies for complex digital designs using AIML enhanced methodologies. You will architect and maintain UVM-based testbench environments and collaborate with design teams. Ideal candidates have hands-on experience in ASIC or SoC design and strong AIML expertise.
This is an external listing. JobSpring does not represent or verify the employer. Report this listing
JobSpring